This section describes the apparatus developed to support investigations into
the evolution of robust electronics. A standard PC runs the evolutionary
algorithm, and is host to the specialised hardware. There are five Xilinx
XC6216 FPGA chips on which fitness evaluations can be performed
simultaneously. One of these resides on a commercial PCI-bus card which plugs
into the PC [13]; a custom-made AT-bus card interfaces the other
four. Test inputs for the FPGAs are given by thresholding the line output of
the PC's standard sound card. There is an analogue integrator circuit for each
FPGA, which can be used to measure the average output voltage over a period of
time. The PC can read and reset the integrators via a commercial
data-acquisition card, and use the measured values in a fitness function. The
setup, jocularly named ` THE EVOLVATRON', is shown in
Fig. 2. More details follow:
