The process of direct hardware evolution just described works by taking account of changes in the real-world performance of a circuit as variations are made to its structure. This is very different from the design methods followed by humans: these always take place at a more abstract level, so that the designer does not have to consider the detailed behaviour of every component and their interactions. Figure 4 gives a sketch of this crucial difference between conventional design and evolution.
Figure 4: A caricature comparison of the difference between design by
conventional methods, and through artificial evolution.
Design, analysis, or simulation of any but the smallest circuits is infeasible unless some of the details of the semiconductor physics are `abstracted away' to form a simpler model. If such designs, analyses, or simulations are to say something useful about the behaviour of the real hardware, the circuits under consideration must be constrained: the details that have been suppressed in forming the abstract model must not be allowed to influence the overall behaviour of the system at the level of description of interest. This means that circuits that can be designed (by humans), analysed, or simulated, can not put to use all of the natural behaviour of the silicon medium: some of it must be discarded for the sake of simplicity of modelling. The standard ways of doing this are embedded into all design methodologies -- the way the system is broken down (perhaps hierarchically) into parts, and the interactions between these parts restricted so that their collective behaviour can be readily understood from a knowledge of their individual properties.
Evolution needs none of this (at least, not for the same reasons). There is no analysis, simulation, or modelling, so no constraints need to be placed on the circuits to facilitate these. Evolution proceeds by taking account of the changes in the overall behaviour as variations (usually small) are made to the circuit's structure: this means that the collective behaviour of the components can be freely exploited without having to be able to predict it from a knowledge of their individual properties. Evolution can be set free to exploit the rich structures and dynamical behaviours that are natural to the silicon medium, exploring beyond the scope of conventional design. The detailed properties of the components and their interactions can be used in composing this system-level behaviour. It takes considerable imagination to envisage what these evolved circuits could be like: the kinds of systems we are familiar with (eg. digital, discrete-time, computational, or hierarchically decomposed circuits) are but a subset of what is possible. (See [20] for the full details of this argument.)
As an example of an application of these ideas in the field of ER, consider
the robot shown in Figure 5. This two-wheeled autonomous
mobile robot has a diameter of 46cm, a height of 63cm, and was required to
display simple wall-avoiding/room-centering behaviour in an empty
2.9m 
4.2m rectangular arena. For this scenario, the d.c. motors were
not allowed to run in reverse and the robot's only sensors were a pair of
time-of-flight sonars rigidly mounted on the robot, one pointing left and the
other right. The sonars fire simultaneously five times a second; when a sonar
fires, its output changes from logic 0 to logic 1 and stays there
until the first echo is sensed at its transducer, at which time its output
returns to 0.
Figure 5: The robot known as ``Mr Chips.''
This experiment was the first work designed to explore the possibilities of directly evolving real hardware [14], and at that time suitable FPGAs were not available. For this reason, an evolvable hardware architecture dubbed the `Dynamic State Machine' (DSM) was developed, to be built out of several readily available chips assembled onto a circuit-board. It is based upon a standard electronic implementation of a finite-state machine (a common simple computational architecture) using a RAM memory chip to hold a look-up table defining the machine's behaviour. The contents of this RAM chip were placed under evolutionary control. Conventionally, the dynamics of the system would be given by a `clock' which causes the machine to change from one state to the next at regular intervals (`clock ticks'), in a way easily described by Boolean (binary) logic. This is an example of a constraint introduced on the circuit's dynamics in order to allow it to be modelled in an abstract framework (in this case, Boolean logic). Thus, for the evolutionary experiment, the clocking constraint was removed. It was placed under evolutionary control whether each signal in the circuit was allowed to run freely in continuous time, or whether it would be synchronised to the clock in the usual way. For the clocked signals, the clock frequency itself was placed under evolutionary control. The clock, which used to be a constraint on the system's dynamics -- forcing it to behave synchronously in discrete time -- has been turned into a resource which can be used to further enrich the continuous-time dynamics of the circuit.
Figure 6 represents the resulting evolvable DSM circuit as a mixed synchronous/asynchronous recurrent logic network, where the two logic functions are implemented by the RAM chip, and are thus under evolutionary control. The `genetic latches' in the figure allow evolution to determine independently whether each signal is synchronised to the clock of evolved frequency, or whether it is free-running in continuous time. Relaxing the dynamical constraints on the circuit has so enriched its capabilities that the sonar echo signals are directly connected to its inputs, and its outputs directly drive the power stages for the motors: normally, pre- and post-processing of the sensorimotor signals would be required.
Figure 6: A representation of the evolvable Dynamic State
Machine, as used in the experiment. Each
is a `Genetic Latch' (see text).
This control system was evolved as a piece of real hardware, with the physical circuit controlling the real motors for all fitness evaluations. For convenience, during evolution the sonar input waveforms were emulated in real-time on the basis of a `Virtual Reality' simulation of the robot's sensory environment, based on velocity measurements taken from the wheels (which were just spinning in the air). Figure 7 shows the behaviour induced in the robot by the final evolved hardware controller: the long-exposure photograph shows the excellent performance in the real world when the real sonars were connected and the robot placed in the arena.
Figure 7: Room-centering in virtual reality and (bottom right) in the real
world, after 35 generations. The top pictures are of 90 seconds of behaviour,
the bottom ones of 60.
Remarkably, the final evolved control system goes directly from sonar echo signals to pulses sent to the motors, using only 32 bits of RAM and three flip-flops (excluding clock generation). This is a truly miniscule amount of electronics to comprise the entire sensorimotor control structure for this robust behaviour, which is able to cope with the highly misleading multiple reflections which are often picked-up by the sonars. Analysis showed that the circuit had very rich dynamics, exploiting a stochastic interplay between continuous-time and discrete-time signals. It is not a finite-state machine, and could not have been designed by conventional methods because the detailed analogue continuous-time properties of the hardware (such as time-delays and metastability constants) are important to its operation: it cannot be modelled by Boolean logic. Control experiments showed that the standard synchronous finite-state machine could not perform this task, so we can conclude that evolution really has been able to explore a richer repertoire of behaviours arising from the same circuitry once the simplifying constraints necessary for designers have been removed. See [14] and [20] for full details.