Case Study 2: Evolving a circuit with minimal constraints

In the previous case-study, some temporal constraints were relaxed, but the general architecture of the system was fixed. The next step is to discover whether evolution really can produce circuits looking completely alien to an electronics designer, or whether in practice such bizarre circuits are unworkable. As first moves towards this radical goal, the evolution of unusual oscillator circuits was investigated, both in simulation [37] and using reconfigurable chips [55]. The latter has been greatly extended and studied rigorously by Huelsbergen et al. [56]; see also this issue. We now elucidate further by studying another task.

The electronic device selected for the experiments is reconfigurable at a very fine grain, so as to impose the minimum of architectural constraints: the Xilinx XC6216 Field-Programmable Gate Array (FPGA)[57]. Fig. 12 shows the subset of its functionality used in the experiment. There is a $64\times 64$ array of cells on the chip, of which only the north-west $10\times 10$ corner was used. The connections between cells, and their internal functions, are controlled by multiplexers. These multiplexers are configured according to the contents of RAM distributed throughout the array. A host microprocessor can write to this `configuration memory,' causing the multiplexers (electronic switches) to be set in a particular way, physically instantiating any one of a vast number of possible electronic circuits on the chip. That circuit will then behave in real time, according to semiconductor physics, without any further intervention. Special blocks around the periphery of the array interface the edge cells to the external pins of the chip, and can be configured as inputs or outputs. In the experiment, there is one input and one output, configured at fixed positions chosen by the investigators.

Figure: A simplified view of the XC6216 FPGA. Only those features used in the experiments are shown. Top: A $10\times 10$ corner of the $64\times 64$ array of cells. Below: The internals of an individual cell, showing the function unit at its centre. The symbol file=mux.ps,angle=270,width=6mm represents a multiplexer -- which of its four inputs is connected to the output (via an inversion) is controlled by the configuration memory. Similar multiplexers are used to implement the user-configurable function F.

The function F within a cell can be configured to be any binary logic function of two inputs, or multiplexer functions of three inputs. However, in the experiment, the design constraints needed for digital operation will not be imposed. The circuit being evolved is a continuous-time, continuous-valued, dynamical system. The components of this system (the cell function and routing multiplexers) have a very high gain, so that if digital design principles are followed then the signals will nearly always be saturated fully high or low. Without these design constraints, there is also the possibility for analogue effects. For example, a NOT gate is physically a very high-gain inverting amplifier, and evolution is free to use it as such.